[mem 0x60000000-0xfebfffff] available for PCI devices [drm] Initialized amdxdna_accel_driver 0.0.0 for 0000:c8:00.1 on minor 0 [drm] amdgpu kernel modesetting enabled. [drm] initializing kernel modesetting (IP DISCOVERY 0x1002:0x1900 0x103C:0x8C95 0xD5). [drm] register mmio base: 0x95600000 [drm] register mmio size: 524288 [drm] vm size is 262144 GB, 4 levels, block size is 9-bit, fragment size is 9-bit [drm] Detected VRAM RAM=512M, BAR=512M [drm] RAM width 128bits DDR5 [drm] amdgpu: 512M of VRAM memory ready [drm] amdgpu: 15678M of GTT memory ready. [drm] GART: num cpu pages 131072, num gpu pages 131072 [drm] PCIE GART of 512M enabled (table at 0x0000008000900000). [drm] Loading DMUB firmware via PSP: version=0x08004E00 [drm] [nvidia-drm] [GPU ID 0x00000100] Loading driver [drm] Display Core v3.2.325 initialized on DCN 3.1.4 [drm] DP-HDMI FRL PCON supported [drm] DMUB hardware initialized: version=0x08004E00 [drm] PSR support 1, DC PSR ver 0, sink PSR ver 3 DPCD caps 0x3a su_y_granularity 4 [drm] ring gfx_32768.1.1 was added [drm] ring compute_32768.2.2 was added [drm] ring sdma_32768.3.3 was added [drm] ring gfx_32768.1.1 ib test pass [drm] ring compute_32768.2.2 ib test pass [drm] ring sdma_32768.3.3 ib test pass [drm] Initialized amdgpu 3.63.0 for 0000:c7:00.0 on minor 0 [drm] Initialized nvidia-drm 0.0.0 for 0000:01:00.0 on minor 1 [drm] pre_validate_dsc:1627 MST_DSC dsc precompute is not needed [mem 0x60000000-0xfebfffff] available for PCI devices [drm] Initialized amdxdna_accel_driver 0.0.0 for 0000:c8:00.1 on minor 0 [drm] amdgpu kernel modesetting enabled. [drm] initializing kernel modesetting (IP DISCOVERY 0x1002:0x1900 0x103C:0x8C95 0xD5). [drm] register mmio base: 0x95600000 [drm] register mmio size: 524288 [drm] vm size is 262144 GB, 4 levels, block size is 9-bit, fragment size is 9-bit [drm] Detected VRAM RAM=512M, BAR=512M [drm] RAM width 128bits DDR5 [drm] amdgpu: 512M of VRAM memory ready [drm] amdgpu: 15678M of GTT memory ready. [drm] GART: num cpu pages 131072, num gpu pages 131072 [drm] PCIE GART of 512M enabled (table at 0x0000008000900000). [drm] Loading DMUB firmware via PSP: version=0x08004E00 [drm] [nvidia-drm] [GPU ID 0x00000100] Loading driver [drm] Display Core v3.2.325 initialized on DCN 3.1.4 [drm] DP-HDMI FRL PCON supported [drm] DMUB hardware initialized: version=0x08004E00 [drm] PSR support 1, DC PSR ver 0, sink PSR ver 3 DPCD caps 0x3a su_y_granularity 4 [drm] ring gfx_32768.1.1 was added [drm] ring compute_32768.2.2 was added [drm] ring sdma_32768.3.3 was added [drm] ring gfx_32768.1.1 ib test pass [drm] ring compute_32768.2.2 ib test pass [drm] ring sdma_32768.3.3 ib test pass [drm] Initialized amdgpu 3.63.0 for 0000:c7:00.0 on minor 0 [drm] Initialized nvidia-drm 0.0.0 for 0000:01:00.0 on minor 1 [drm] pre_validate_dsc:1627 MST_DSC dsc precompute is not needed [drm] PCIE GART of 512M enabled (table at 0x0000008000900000). [drm] ring gfx_32789.1.1 was added [drm] ring compute_32789.2.2 was added [drm] ring sdma_32789.3.3 was added [drm] ring gfx_32789.1.1 ib test pass [drm] ring compute_32789.2.2 ib test pass [drm] ring sdma_32789.3.3 ib test pass [drm] PCIE GART of 512M enabled (table at 0x0000008000900000). [drm] ring gfx_32790.1.1 was added [drm] ring compute_32790.2.2 was added [drm] ring sdma_32790.3.3 was added [drm] ring gfx_32790.1.1 ib test pass [drm] ring compute_32790.2.2 ib test pass [drm] ring sdma_32790.3.3 ib test pass [drm] PCIE GART of 512M enabled (table at 0x0000008000900000). [drm] ring gfx_32770.1.1 was added [drm] ring compute_32770.2.2 was added [drm] ring sdma_32770.3.3 was added [drm] ring gfx_32770.1.1 ib test pass [drm] ring compute_32770.2.2 ib test pass [drm] ring sdma_32770.3.3 ib test pass [mem 0x60000000-0xfebfffff] available for PCI devices [drm] Initialized amdxdna_accel_driver 0.0.0 for 0000:c8:00.1 on minor 0 [drm] amdgpu kernel modesetting enabled. [drm] initializing kernel modesetting (IP DISCOVERY 0x1002:0x1900 0x103C:0x8C95 0xD5). [drm] register mmio base: 0x95600000 [drm] register mmio size: 524288 [drm] vm size is 262144 GB, 4 levels, block size is 9-bit, fragment size is 9-bit [drm] Detected VRAM RAM=512M, BAR=512M [drm] RAM width 128bits DDR5 [drm] amdgpu: 512M of VRAM memory ready [drm] amdgpu: 15679M of GTT memory ready. [drm] GART: num cpu pages 131072, num gpu pages 131072 [drm] PCIE GART of 512M enabled (table at 0x0000008000900000). [drm] Loading DMUB firmware via PSP: version=0x08004E00 [drm] [nvidia-drm] [GPU ID 0x00000100] Loading driver [drm] Display Core v3.2.325 initialized on DCN 3.1.4 [drm] DP-HDMI FRL PCON supported [drm] DMUB hardware initialized: version=0x08004E00 [drm] PSR support 1, DC PSR ver 0, sink PSR ver 3 DPCD caps 0x3a su_y_granularity 4 [drm] ring gfx_32768.1.1 was added [drm] ring compute_32768.2.2 was added [drm] ring sdma_32768.3.3 was added [drm] ring gfx_32768.1.1 ib test pass [drm] ring compute_32768.2.2 ib test pass [drm] ring sdma_32768.3.3 ib test pass [drm] Initialized amdgpu 3.63.0 for 0000:c7:00.0 on minor 0 [drm] Initialized nvidia-drm 0.0.0 for 0000:01:00.0 on minor 1 [drm] pre_validate_dsc:1627 MST_DSC dsc precompute is not needed [drm] PCIE GART of 512M enabled (table at 0x0000008000900000). [drm] ring gfx_32786.1.1 was added [drm] ring compute_32786.2.2 was added [drm] ring sdma_32786.3.3 was added [drm] ring gfx_32786.1.1 ib test pass [drm] ring compute_32786.2.2 ib test pass [drm] ring sdma_32786.3.3 ib test pass [drm] PCIE GART of 512M enabled (table at 0x0000008000900000). [drm] ring gfx_32786.1.1 was added [drm] ring compute_32786.2.2 was added [drm] ring sdma_32786.3.3 was added [drm] ring gfx_32786.1.1 ib test pass [drm] ring compute_32786.2.2 ib test pass [drm] ring sdma_32786.3.3 ib test pass [drm] PCIE GART of 512M enabled (table at 0x0000008000900000). [drm] ring gfx_32786.1.1 was added [drm] ring compute_32786.2.2 was added [drm] ring sdma_32786.3.3 was added [drm] ring gfx_32786.1.1 ib test pass [drm] ring compute_32786.2.2 ib test pass [drm] ring sdma_32786.3.3 ib test pass [drm] PCIE GART of 512M enabled (table at 0x0000008000900000). [drm] ring gfx_32786.1.1 was added [drm] ring compute_32786.2.2 was added [drm] ring sdma_32786.3.3 was added [drm] ring gfx_32786.1.1 ib test pass [drm] ring compute_32786.2.2 ib test pass [drm] ring sdma_32786.3.3 ib test pass [drm] PCIE GART of 512M enabled (table at 0x0000008000900000). [drm] ring gfx_32786.1.1 was added [drm] ring compute_32786.2.2 was added [drm] ring sdma_32786.3.3 was added [drm] ring gfx_32786.1.1 ib test pass [drm] ring compute_32786.2.2 ib test pass [drm] ring sdma_32786.3.3 ib test pass [drm] PCIE GART of 512M enabled (table at 0x0000008000900000). [drm] ring gfx_32786.1.1 was added [drm] ring compute_32786.2.2 was added [drm] ring sdma_32786.3.3 was added [drm] ring gfx_32786.1.1 ib test pass [drm] ring compute_32786.2.2 ib test pass [drm] ring sdma_32786.3.3 ib test pass [drm] PCIE GART of 512M enabled (table at 0x0000008000900000). [drm] ring gfx_32786.1.1 was added [drm] ring compute_32786.2.2 was added [drm] ring sdma_32786.3.3 was added [drm] ring gfx_32786.1.1 ib test pass [drm] ring compute_32786.2.2 ib test pass [drm] ring sdma_32786.3.3 ib test pass [drm] PCIE GART of 512M enabled (table at 0x0000008000900000). [drm] ring gfx_32786.1.1 was added [drm] ring compute_32786.2.2 was added [drm] ring sdma_32786.3.3 was added [drm] ring gfx_32786.1.1 ib test pass [drm] ring compute_32786.2.2 ib test pass [drm] ring sdma_32786.3.3 ib test pass [drm] PCIE GART of 512M enabled (table at 0x0000008000900000). [drm] ring gfx_32795.1.1 was added [drm] ring compute_32795.2.2 was added [drm] ring sdma_32795.3.3 was added [drm] ring gfx_32795.1.1 ib test pass [drm] ring compute_32795.2.2 ib test pass [drm] ring sdma_32795.3.3 ib test pass [drm] PCIE GART of 512M enabled (table at 0x0000008000900000). [drm] ring gfx_32795.1.1 was added [drm] ring compute_32795.2.2 was added [drm] ring sdma_32795.3.3 was added [drm] ring gfx_32795.1.1 ib test pass [drm] ring compute_32795.2.2 ib test pass [drm] ring sdma_32795.3.3 ib test pass [drm] PCIE GART of 512M enabled (table at 0x0000008000900000). [drm] ring gfx_32795.1.1 was added [drm] ring compute_32795.2.2 was added [drm] ring sdma_32795.3.3 was added [drm] ring gfx_32795.1.1 ib test pass [drm] ring compute_32795.2.2 ib test pass [drm] ring sdma_32795.3.3 ib test pass [drm] PCIE GART of 512M enabled (table at 0x0000008000900000). [drm] ring gfx_32795.1.1 was added [drm] ring compute_32795.2.2 was added [drm] ring sdma_32795.3.3 was added [drm] ring gfx_32795.1.1 ib test pass [drm] ring compute_32795.2.2 ib test pass [drm] ring sdma_32795.3.3 ib test pass